• Electrical rules checking - that enables designers to validate designs at the schematic capture stage, to ensure that all possible measures have been taken, to maximize test coverage aligned to the PCB manufacturers test flow and prevent costly design errors at the earliest opportunity.
  
  
• Test point saving - to identify nets not requiring physical test access, only placing test points where absolutely necessary and significantly reducing test fixturing costs due to less complex fixtures and fewer probes.
  
  
• Test coverage estimation - to maximize test and inspection coverage by estimating the theoretical coverage aligned to test strategy, and perform 'what-if' analysis to identify the optimal test strategy to achieve maximum coverage, eliminating redundant test steps.
  
  
• Test coverage measurement - import vendor specific test programs/reports, to determine the real test efficiency against the theoretical coverage expectations and identify areas for improvement.
  
  
• Tester exporters - shorten the downstream test development process for boundary-scan tests by generating the test data files directly from schematic data, for JTAG Boundary-Scan tool vendors such as: ASSET, ACCULOGIC, CORELIS, GOEPEL, JTAG Technologies and TEMENTO.

In order to provide a DfT Analysis, ASTER will require:

• Completion of non-disclosure agreement (protect your IP).
• Schematic diagram for related board design (searchable PDF format preferred).
• Schematic netlist file (details of CAD tool used for schematic capture required, to specify preferred file format).
• Board layout file (details of CAD tool used for board layout required, to specify preferred file format).
• Bill-of-Materials (BOM).
• Customer expectations from the DfT and test coverage analysis i.e. what test strategies should be considered.

From this information, ASTER will provide an in-depth design/testability analysis, identifying any DfT violations applicable to the boundary-scan 1149.1 and ICT MIL-STD2165 structural test standards, and calculate the theoretical test coverage, dependant on the mix of test strategies defined by the customer, such as AOI, AXI, MDA, FPT, ICT, BST and FT.

ASTER can also provide a detailed test coverage analysis based on the actual coverage provided by a range of test/inspection equipments, by importing the debugged test or inspection programs. Upon completion of the analysis the customer will receive an in-depth synthetic report containing embedded reports generated by the TestWay analysis.

The price of such a service may vary according to the board complexity and the customer objectives for the DfT analysis, which will be determined once the board design has been reviewed.

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